1. Field of the Invention
The present invention relates to a wireless communication circuit with an indicator, and in particular to a wireless communication circuit with an wideband received signal strength indicator for multi-wireless systems.
2. Background
Since multi-systems operation is popular in the future, like Bluetooth signal and wireless local area network (WLAN) systems. To enlarge the received signal to the maximum threshold swing of the analog-to-digital converter (ADC), traditionally, receive signal strength indicator (RSSI) and auto gain control (AGC) circuit are added into the baseband demodulator of the wireless local area network (WLAN) receiver. The object is adjusting the gain of the low-noise amplifier and the variable gain amplifier (VGA) through estimating the value of the received signal, thus the received signal can be enlarged to the maximum threshold swing of the analog-to-digital converter, and rise the sensitivity of the systems.
However, except the desired wireless local area network (WLAN) signal, the received signals comprising the noise from the adjacent channel interference and multipath fading causes the received signal strength indicator can not detect the strength of the interference effectively. As shown in FIG. 1, if the strength of the noise is too large, the low-noise amplifier 3 and the mixer 4 in the front-end of radio frequency would saturate and reduce the sensitivity of the receiver.
To detect the interference of the signal in the channel for resolving the problem of the circuit saturation in the front-end of radio frequency, in general, wideband receive signal strength indicator (WRSSI or WBRSSI) circuit 11 is used to detect whether the front-end radio frequency will saturate for the baseband auto gain controller, and adjust the gain of low-noise amplifier to avoid saturation. However, the additional circuit with wideband received signal strength indicator increases the circuit size.
U.S. Pat. No. 7,605,731 discloses a signal processor with a signal strength detection circuit that is coupled to a loop of an analog to digital converter. It discloses a loop formed by shunting a filter to an analog-to-digital converter, and a loop signal detector is configured on the signal strength detection circuit. By detecting the signal strength of the filter through the loop signal detector, and generating a gain controlling signal, the delay time of the signal strength detection can be reduced. The patent focuses particularly on the utilization of the filter and the loop signal detector, however, the operation exhibits larger circuit size.
The method of circuits sharing can reduce integration circuit (IC) cost. Besides, large interferences will degrade receive quality, so WBRSSI block is must in the receiver design. According to the disadvantage of the prior art, the inventor proposes a circuit with an indicating detection of wideband received signal strength and auto gain control and method thereof, used for overcoming the above problems.